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FDE and Processor Performance

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Last updated over 2 years ago
7 questions
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Order the sequence of FDE Cycle
ALU executes the instructions if instruction is to perform arithmetic or logical or comparison operation. I/O ( input and output) instructions are executed by the I/O devices.
Instructions to be executed are fetched by the buses from the RAM and stored in Registers in the processor
Instruction in CIR is decoded by the control unit and signal are sent to execute the instruction
Below are the steps that how instructions/ data is fetched from the processor. They are out of order, list them in order
The instruction/ data is fetched from address in memory and send to MDR using data bus
Program counter (PC) holds address of the instruction to be fetched from the RAM
Instruction in MDR is sent to CIR via data bus
PC is incremented to the address of the next instruction to be fetched
Address in PC is sent to the MAR via address bus  ​
What is an interrupt in computer science?
A signal from a device or software to the processor
A type of computer virus
A program's execution order
A hardware failure
What happens when a processor receives an interrupt signal?
Processor speeds up its processing
Processor temporarily stops its current process to service the interrupt
Processor ignores the interrupt
Processor turns off
What could cause an interrupt signal?
A power outage
A paper jam in a printer
An internet disconnection
A software update
Order the steps when interrupt is detected how is it serviced
appropriate ISR is called to handle the interrupt
If higher priority than current process …state of current process is / registers are stored on stack
When ISR finished, check for further interrupts (of high priority) / return to step 1
Location / type of interrupt identified...
Otherwise load data from stack and continue with process
Priority is checked If lower priority than current process continue with F-E cycle
Interrupt is detected only at at the start of the FDE cycle
True
False