A2 - CS - End of Unit 15 test
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Last updated 6 months ago
11 questions
Answer all the questions.
4
Four descriptions of computer architecture are shown below.Match each description to the appropriate type of computer architecture.
Four descriptions of computer architecture are shown below.
Match each description to the appropriate type of computer architecture.
SIMD | MISD | SISD | MIMD | |
|---|---|---|---|---|
A computer that does not have the ability for parallel processing. | ||||
The processor has several ALUs. Each ALU executes the same instructions but on different data. | ||||
There are several processors. Each processor executes different instructions drawn from a common pool. Each processor operates on different data drawn from a common pool. | ||||
There is only one processor executing one set of instructions on a single set of data. |
2
In a massively parallel computer explain what is meant by:i) Massive [1]ii) Parallel [1]
In a massively parallel computer explain what is meant by:
i) Massive [1]
ii) Parallel [1]
3
a) Write down the Boolean expression to represent the logic circuit below. [4]
a) Write down the Boolean expression to represent the logic circuit below. [4]
4
Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]
Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]
2
Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]
Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]
7
Consider the following truth table.
ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]
Consider the following truth table.
i) Draw a Karnaugh map from this truth table. [3]
ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]
4
Use the laws of Boolean algebra to simplify:
Use the laws of Boolean algebra to simplify:
8
Match each statement with the correct processor architecture.
Match each statement with the correct processor architecture.
CISC | RISC | |
|---|---|---|
longer execution time for instructions | ||
decoding of instructions is more complex | ||
it is more difficult to make pipelining work | ||
uses fewer addressing modes | ||
makes use of single-cycle instructions | ||
instructions are of a fixed length | ||
faster execution time for instructions | ||
there are more addressing modes |
7
A processor uses pipelining. The following instructions are to be input:
1 LOAD A2 LOAD B3 LOAD C4 ADD A,B,C5 STORE D6 OUT D
There are 5 stages in fetch-decode-execute cycle of each instruction.
a) Draw a diagram to show how many clock cycles are needed for these six instructions to be carried out. [6]
b) state how many clock cycles are required to complete the above instructions without pipelining. [1]
A processor uses pipelining. The following instructions are to be input:
1 LOAD A
2 LOAD B
3 LOAD C
4 ADD A,B,C
5 STORE D
6 OUT D
There are 5 stages in fetch-decode-execute cycle of each instruction.
a) Draw a diagram to show how many clock cycles are needed for these six instructions to be carried out. [6]
b) state how many clock cycles are required to complete the above instructions without pipelining. [1]
7
a) Explain the following terms and why they are used when sending packets across a network. i) hop number/hopping [2]ii) checksum [2]
b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]
a) Explain the following terms and why they are used when sending packets across a network.
i) hop number/hopping [2]
ii) checksum [2]
b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]
4
a) Convert this binary floating-point number into denary. [3]
b) Normalise the following binary floating-point number. [1]0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0
a) Convert this binary floating-point number into denary. [3]
b) Normalise the following binary floating-point number. [1]
0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0