A2 - CS - End of Unit 15 test

Last updated 9 months ago

11 questions

Instructions

4

2

3

4

2

7

4

8

7

4

Library

A2 - CS - End of Unit 15 test

Last updated 9 months ago

11 questions

Instructions

Answer all the questions.

4

2

In a massively parallel computer explain what is meant by:
i) Massive [1]
ii) Parallel [1]

3

a) Write down the Boolean expression to represent the logic circuit below. [4]

4

Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]

2

Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]

7

Consider the following truth table.

i) Draw a Karnaugh map from this truth table. [3]

ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

4

Use the laws of Boolean algebra to simplify:

8

7

A processor uses pipelining. The following instructions are to be input:

1 LOAD A
2 LOAD B
3 LOAD C
4 ADD A,B,C
5 STORE D
6 OUT D

There are 5 stages in fetch-decode-execute cycle of each instruction.

a) Draw a diagram to show how many clock cycles are needed for these six instructions to be carried out. [6]

b) state how many clock cycles are required to complete the above instructions without pipelining. [1]

7

a) Explain the following terms and why they are used when sending packets across a network.
i) hop number/hopping [2]
ii) checksum [2]

b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

4

a) Convert this binary floating-point number into denary. [3]

b) Normalise the following binary floating-point number. [1]
0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0

Answer all the questions.

Four descriptions of computer architecture are shown below.
Match each description to the appropriate type of computer architecture.

	SIMD	MISD	SISD	MIMD
A computer that does not have the ability for parallel processing.
The processor has several ALUs. Each ALU executes the same instructions but on different data.
There are several processors. Each processor executes different instructions drawn from a common pool. Each processor operates on different data drawn from a common pool.
There is only one processor executing one set of instructions on a single set of data.

In a massively parallel computer explain what is meant by:
i) Massive [1]
ii) Parallel [1]

a) Write down the Boolean expression to represent the logic circuit below. [4]

Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]

Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]

Consider the following truth table.

i) Draw a Karnaugh map from this truth table. [3]

ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

Use the laws of Boolean algebra to simplify:

Match each statement with the correct processor architecture.

	CISC	RISC
longer execution time for instructions
decoding of instructions is more complex
it is more difficult to make pipelining work
uses fewer addressing modes
makes use of single-cycle instructions
instructions are of a fixed length
faster execution time for instructions
there are more addressing modes

A processor uses pipelining. The following instructions are to be input:

1 LOAD A
2 LOAD B
3 LOAD C
4 ADD A,B,C
5 STORE D
6 OUT D

There are 5 stages in fetch-decode-execute cycle of each instruction.

a) Draw a diagram to show how many clock cycles are needed for these six instructions to be carried out. [6]

b) state how many clock cycles are required to complete the above instructions without pipelining. [1]

a) Explain the following terms and why they are used when sending packets across a network.
i) hop number/hopping [2]
ii) checksum [2]

b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

a) Convert this binary floating-point number into denary. [3]

b) Normalise the following binary floating-point number. [1]
0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0

Four descriptions of computer architecture are shown below.
Match each description to the appropriate type of computer architecture.

     SIMD

    MISD

     SISD

        MIMD

A computer that does not have the
ability for parallel processing.

The processor has several ALUs. Each
ALU executes the same instructions but
on different data.

There are several processors.
Each processor executes different
instructions drawn from a common pool. Each processor operates on different
data drawn from a common pool.

There is only one processor executing
one set of instructions on a single set of data.

Match each statement with the correct processor architecture.

                      CISC

                      RISC

longer execution time for instructions

decoding of instructions is more complex

it is more difficult to make pipelining work

uses fewer addressing modes

makes use of single-cycle instructions

instructions are of a fixed length

faster execution time for instructions

there are more addressing modes

A2 - CS - End of Unit 15 test

A2 - CS - End of Unit 15 test

In a massively parallel computer explain what is meant by:i) Massive [1]ii) Parallel [1]

a) Write down the Boolean expression to represent the logic circuit below. [4]

Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]

Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]

Consider the following truth table.i) Draw a Karnaugh map from this truth table. [3]ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

Use the laws of Boolean algebra to simplify:

a) Explain the following terms and why they are used when sending packets across a network. i) hop number/hopping [2]ii) checksum [2]b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

a) Convert this binary floating-point number into denary. [3]b) Normalise the following binary floating-point number. [1]0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0

Four descriptions of computer architecture are shown below.Match each description to the appropriate type of computer architecture.

In a massively parallel computer explain what is meant by:i) Massive [1]ii) Parallel [1]

a) Write down the Boolean expression to represent the logic circuit below. [4]

Produce the Karnaugh map to represent the logic circuit in question 3 and hence write down a simplified Boolean expression. [4]

Draw a simplified logic circuit from your Boolean expression in question 4 using AND and OR gates only. [2]

Consider the following truth table.i) Draw a Karnaugh map from this truth table. [3]ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

Use the laws of Boolean algebra to simplify:

Match each statement with the correct processor architecture.

a) Explain the following terms and why they are used when sending packets across a network. i) hop number/hopping [2]ii) checksum [2]b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

a) Convert this binary floating-point number into denary. [3]b) Normalise the following binary floating-point number. [1]0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0

In a massively parallel computer explain what is meant by:
i) Massive [1]
ii) Parallel [1]

Consider the following truth table.

i) Draw a Karnaugh map from this truth table. [3]

ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

a) Explain the following terms and why they are used when sending packets across a network.
i) hop number/hopping [2]
ii) checksum [2]

b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

a) Convert this binary floating-point number into denary. [3]

b) Normalise the following binary floating-point number. [1]
0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0

Four descriptions of computer architecture are shown below.
Match each description to the appropriate type of computer architecture.

In a massively parallel computer explain what is meant by:
i) Massive [1]
ii) Parallel [1]

Consider the following truth table.

i) Draw a Karnaugh map from this truth table. [3]

ii) Use your Karnaugh map from i) to produce a Boolean expression. [4]

a) Explain the following terms and why they are used when sending packets across a network.
i) hop number/hopping [2]
ii) checksum [2]

b) Describe how headers and routing tables are used to route packets efficiently from a sender to recipient. [3]

a) Convert this binary floating-point number into denary. [3]

b) Normalise the following binary floating-point number. [1]
0. 0 0 0 1 1 0 1 0 0 0 0 0 1 1 0