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G10 - CS - Von Neumann architecture & FDE cycle

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Last updated 8 months ago
13 questions
1
1
1
1
1
4
4
3
2
1
1
1
2
Question 1
1.

What step follows decoding in the Fetch-decode-execute cycle?

Question 2
2.

What is the purpose of the fetch phase in the cycle?

Question 3
3.

During the execute step, what action is performed?

Question 4
4.

Which phase involves interpreting the fetched instruction?

Question 5
5.

In Von Neumann architecture, data and instructions are stored together in the same memory.

Question 6
6.

Match the components of a Von Neumann architecture system.

Draggable itemarrow_right_altCorresponding Item
Arithmetic Logic Unit (ALU)
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Performs arithmetic and logical operations
Memory unit
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Monitor, printer, speakers
Output devices
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Keyboard, mouse, microphone
Input devices
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RAM, ROM, Cache
Question 7
7.

Connect the stages of an instruction cycle in Von Neumann.

Draggable itemarrow_right_altCorresponding Item
Execute
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Perform the operation
Fetch
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Get next instruction from memory
Store
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Write the result back to memory
Decode
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Interpret the instruction
Question 8
8.

Match each data packet component with its description.

Draggable itemarrow_right_altCorresponding Item
Header
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Identifies the source and destination of the packet
Trailer
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Contains error-checking information to ensure data integrity
Payload
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Actual data being transmitted in the packet
Question 9
9.

Link each Von Neumann architecture unit with its role.

Draggable itemarrow_right_altCorresponding Item
ALU
arrow_right_alt
Performs arithmetic and logic operations on data within the CPU
Control unit
arrow_right_alt
Coordinates activity of computer components to carry out instructions
Convert the following negative binary numbers (written in two’s complement format) into negative denary numbers:
Question 10
10.

1 1 0 0 1 1 0 1

Question 11
11.

1 0 1 0 0 0 0 0

Convert the following hexadecimal numbers into denary:
Question 12
12.

4 A

Question 13
13.

1 F F