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Biblioteka

G10 - CS - Von Neumann architecture & FDE cycle

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Posljednje ažuriranje about 1 year ago
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Convert the following negative binary numbers (written in two’s complement format) into negative denary numbers:

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Convert the following hexadecimal numbers into denary:

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Pitanje 1
1.

What step follows decoding in the Fetch-decode-execute cycle?

Pitanje 2
2.

What is the purpose of the fetch phase in the cycle?

Pitanje 3
3.

During the execute step, what action is performed?

Pitanje 4
4.

Which phase involves interpreting the fetched instruction?

Pitanje 5
5.

In Von Neumann architecture, data and instructions are stored together in the same memory.

Pitanje 6
6.

Match the components of a Von Neumann architecture system.

Stavka koja se može prevućiarrow_right_altOdgovarajuća stavka

Output devices

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Performs arithmetic and logical operations

Input devices

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Monitor, printer, speakers

Memory unit

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Keyboard, mouse, microphone

Arithmetic Logic Unit (ALU)

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RAM, ROM, Cache

Pitanje 7
7.

Connect the stages of an instruction cycle in Von Neumann.

Stavka koja se može prevućiarrow_right_altOdgovarajuća stavka

Store

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Perform the operation

Execute

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Get next instruction from memory

Decode

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Write the result back to memory

Fetch

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Interpret the instruction

Pitanje 8
8.

Match each data packet component with its description.

Stavka koja se može prevućiarrow_right_altOdgovarajuća stavka

Trailer

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Identifies the source and destination of the packet

Payload

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Contains error-checking information to ensure data integrity

Header

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Actual data being transmitted in the packet

Pitanje 9
9.

Link each Von Neumann architecture unit with its role.

Stavka koja se može prevućiarrow_right_altOdgovarajuća stavka

Control unit

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Performs arithmetic and logic operations on data within the CPU

ALU

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Coordinates activity of computer components to carry out instructions

Pitanje 10
10.

1 1 0 0 1 1 0 1

Pitanje 11
11.

1 0 1 0 0 0 0 0

Pitanje 12
12.

4 A

Pitanje 13
13.

1 F F