G10 - CS - Von Neumann architecture & FDE cycle

Last updated 12 months ago

13 questions

1

4

3

2

1

2

Last updated 12 months ago

13 questions

1

4

4

3

2

Draggable item		Corresponding Item

Convert the following negative binary numbers (written in  two’s complement format) into negative denary numbers:

1

1 1 0 0 1 1 0 1

1

Convert the following hexadecimal numbers into denary:

1

2

Fetch

Read

Return

Execute

To calculate result

To decode data

To store data

To get instructions

Carry out the instruction

Retrieve data

Analyze data

Store data

Fetch

Execute

Input

Decode

True

False

Draggable item		Corresponding Item
Output devices		Performs arithmetic and logical operations
Input devices		Monitor, printer, speakers
Memory unit		Keyboard, mouse, microphone
Arithmetic Logic Unit (ALU)		RAM, ROM, Cache

Draggable item		Corresponding Item
Store		Perform the operation
Execute		Get next instruction from memory
Decode		Write the result back to memory
Fetch		Interpret the instruction

Draggable item		Corresponding Item
Trailer		Identifies the source and destination of the packet
Payload		Contains error-checking information to ensure data integrity
Header		Actual data being transmitted in the packet

Draggable item		Corresponding Item
Control unit		Performs arithmetic and logic operations on data within the CPU
ALU		Coordinates activity of computer components to carry out instructions

Convert the following negative binary numbers (written in  two’s complement format) into negative denary numbers:

Convert the following hexadecimal numbers into denary:

What step follows decoding in the Fetch-decode-execute cycle?

Fetch

Read

Return

Execute

What is the purpose of the fetch phase in the cycle?

To calculate result

To decode data

To store data

To get instructions

During the execute step, what action is performed?

Carry out the instruction

Retrieve data

Analyze data

Store data

Which phase involves interpreting the fetched instruction?

Fetch

Execute

Input

Decode

In Von Neumann architecture, data and instructions are stored together in the same memory.

True

False

Match the components of a Von Neumann architecture system.

Output devices

Performs arithmetic and logical operations

Input devices

Monitor, printer, speakers

Memory unit

Keyboard, mouse, microphone

Arithmetic Logic Unit (ALU)

RAM, ROM, Cache

Connect the stages of an instruction cycle in Von Neumann.

Store

Perform the operation

Execute

Get next instruction from memory

Decode

Write the result back to memory

Fetch

Interpret the instruction

Match each data packet component with its description.

Trailer

Identifies the source and destination of the packet

Payload

Contains error-checking information to ensure data integrity

Header

Actual data being transmitted in the packet

Link each Von Neumann architecture unit with its role.

Control unit

Performs arithmetic and logic operations on data within the CPU

ALU

Coordinates activity of computer components to carry out instructions